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65816

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Among the processors of the 65xx family, the 65816 processor has the most features. The 65816 is a 65c02 with more opcodes, thus the correct name is the 65c816. We tend to skip the c. The 65c02 and 65c816 remained on the market during year 2009, as products of Western Design Center.

The 65816 processor has a 24-bit address space and can do addition and subtraction of 16-bit integers. The 65816 is old technology; hackers who code for the 65816 will soon wish to instead have a better, more modern processor. ROM hackers know the 65816 as the central processor of the SNES. The machine code in SNES hacks is 65816 code (excepting code for coprocessors like the SPC-700). The SNES uses a model of 65816 stamped 5A22, which might be a custom processor with a 65816 core. The 5A22 has all 65816 instructions. Some documents use the name S-CPU for the 5A22.

Contents

65816 assemblers Edit

There are many 65816 assemblers, but three of them can assemble or patch ROM images following the SNES ROM layout. These three are:

Wiki pages Edit

Mnemonics Edit

Mnemonic 65816 instruction
adc ADd with Carry
and bitwise AND accumulator
asl Arithmetic Shift Left
bcc Branch if Carry Clear
bcs Branch if Carry Set
beq Branch if EQual to zero
bit BIT
bmi Branch if MInus
bne Branch if Not Equal to zero
bpl Branch if PLus
bra BRanch Always
brk BReaKpoint interrupt
brl BRanch Long
bvc BRanch if oVerflow Clear
bvs BRanch if oVerflow Set
clc CLear Carry flag
cld CLear Decimal flag
cli CLear disabled Irq flag
clv Clear oVerflow flag
cmp CoMPare accumulator
cop COProcessor interrupt
cpx ComPare X
cpy ComPare Y
dec DECrement
dex DEcrement X
dey DEcrement Y
eor bitwise Exclusive OR accumulator
inc INCrement
inx INcrement X
iny INcrement Y
jml JuMp to Long address
jmp JuMP to address
jsl Jump to Subroutine Long
jsr Jump to SubRoutine
lda LoaD Accumulator
ldx LoaD X
ldy LoaD Y
lsr Logical Shift Right
mvn MoVe Negative
mvp MoVe Positive
nop No OPeration
ora bitwise OR Accumulator
pea Push Effective Address
pei Push Effective Indirect address
per Push Effective Relative address
pha PusH Accumulator
phb PusH data Bank
phd PusH Direct page pointer
phk PusH program banK
php PusH Processor flags
phx PusH X
phy PusH Y
pla PulL Accumulator
plb PulL data Bank
pld PulL Direct page pointer
plp PulL Processor flags
plx PulL X
ply PulL Y
rep REset Processor flags
rol ROtate Left
ror ROtate Right
rti ReTurn from Interrupt
rtl ReTurn from Long subroutine
rts ReTurn from Subroutine
sbc SuBtract with Carry
sec SEt Carry flag
sed SEt Decimal flag
sei SEt disabled Irq flag
sep SEt Processor flags
sta STore to Accumulator
stp SToP processor
stx STore to X
sty STore to Y
stz STore Zero
tax Transfer Accumulator to X
tay Transfer Accumulator to Y
tcd Transfer aCcumulator to Direct page pointer
tcs Transfer aCcumulator to Stack pointer
tdc Transfer Direct page pointer to aCcumulator
trb Test and Reset Bits
tsb Test and Set Bits
tsc Transfer Stack pointer to aCcumulator
tsx Transfer Stack pointer to X
txa Transfer X to Accumulator
txs Transfer X to Stack pointer
txy Transfer X to Y
tya Transfer Y to Accumulator
tyx Transfer Y to X
wai WAIt for interrupt
wdm William D. Mensch
xba eXchange B and A accumulators
xce eXchange Carry and Emulation flags
This list excludes many alternate mnemonics. This box is {{mtable.65816}}.

References Edit

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